History of general purpose CPUs

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%3D%22International+Business+Machines%22%3EIBM%3C%2Fa%3E+on+their+%3Ca+class%3D%22mw-redirect%22+href%3D%22http%3A%2F%2Fen.wikipedia.org%2Fwiki%2FIBM_7030%22+title%3D%22IBM+7030%22%3EStretch%3C%2Fa%3E+mainframe+computer.%3Ch2%3E%0D%0A%3Cspan+class%3D%22mw-headline%22+id%3D%221990_to_today%3A_looking_forward%22%3E1990+to+today%3A+looking+forward%3C%2Fspan%3E%3C%2Fh2%3E%0D%0A%3Ch2%3E%0D%0A%3Cspan+class%3D%22mw-headline%22+id%3D%221990_to_today%3A_looking_forward%22%3E%26nbsp%3B%3C%2Fspan%3E%3C%2Fh2%3E%0D%0A%3Ch3%3E%0D%0A%3Cspan+class%3D%22mw-headline%22+id%3D%22VLIW_and_EPIC%22%3EVLIW+and+EPIC%3C%2Fspan%3E%3C%2Fh3%3E%0D%0AThe+instruction+scheduling+logic+that+makes+a+superscalar+processor++is+just+boolean+logic.+In+the+early+1990s%2C+a+significant+innovation+was++to+realize+that+the+coordination+of+a+multiple-ALU+computer+could+be++moved+into+the+%3Ca+href%3D%22http%3A%2F%2Fen.wikipedia.org%2Fwiki%2FCompiler%22+title%3D%22Compiler%22%3Ecompiler%3C%2Fa%3E%2C+the+software+that+translates+a+programmer%27s+instructions+into+machine-level+instructions.%0D%0AThis+type+of+computer+is+called+a+%3Cb%3E%3Ca+href%3D%22http%3A%2F%2Fen.wikipedia.org%2Fwiki%2FVery_long_instruction_word%22+title%3D%22Very+long+instruction+word%22%3Every+long+instruction+word%3C%2Fa%3E%3C%2Fb%3E+%28VLIW%29+computer.%0D%0AStatically+scheduling+the+instructions+in+the+compiler+%28as+opposed+to++letting+the+processor+do+the+scheduling+dynamically%29+can+reduce+CPU++complexity.+This+can+improve+performance%2C+reduce+heat%2C+and+reduce+cost.%0D%0AUnfortunately%2C+the+compiler+lacks+accurate+knowledge+of+runtime++scheduling+issues.+Merely+changing+the+CPU+core+frequency+multiplier++will+have+an+effect+on+scheduling.+Actual+operation+of+the+program%2C+as++determined+by+input+data%2C+will+have+major+effects+on+scheduling.+To++overcome+these+severe+problems+a+VLIW+system+may+be+enhanced+by+adding++the+normal+dynamic+scheduling%2C+losing+some+of+the+VLIW+advantages.%0D%0AStatic+scheduling+in+the+compiler+also+assumes+that+dynamically+generated+code+will+be+uncommon.+Prior+to+the+creation+of+%3Ca+class%3D%22mw-redirect%22+href%3D%22http%3A%2F%2Fen.wikipedia.org%2Fwiki%2FJava_Virtual_Machine%22+title%3D%22Java+Virtual+Machine%22%3EJava%3C%2Fa%3E%2C+this+was+in+fact+true.+It+was+reasonable+to+assume+that+slow+compiles+would+only+affect+software+developers.+Now%2C+with+%3Ca+href%3D%22http%3A%2F%2Fen.wikipedia.org%2Fwiki%2FJust-in-time_compilation%22+title%3D%22Just-in-time+compilation%22%3EJIT%3C%2Fa%3E+virtual+machines+for+Java+and+%3Ca+href%3D%22http%3A%2F%2Fen.wikipedia.org%2Fwiki%2F.NET_Framework%22+title%3D%22.NET+Framework%22%3E.NET%3C%2Fa%3E%2C+slow+code+generation+affects+users+as+well.%0D%0AThere+were+several+unsuccessful+attempts+to+commercialize+VLIW.+The++basic+problem+is+that+a+VLIW+computer+does+not+scale+to+different+price++and+performance+points%2C+as+a+dynamically+scheduled+computer+can.+Another++issue+is+that+compiler+design+for+VLIW+computers+is+extremely++difficult%2C+and+the+current+crop+of+compilers+%28as+of+2005%29+don%27t+always++produce+optimal+code+for+these+platforms.%0D%0AAlso%2C+VLIW+computers+optimise+for+throughput%2C+not+low+latency%2C+so++they+were+not+attractive+to+the+engineers+designing+controllers+and++other+computers+embedded+in+machinery.+The+%3Ca+href%3D%22http%3A%2F%2Fen.wikipedia.org%2Fwiki%2FEmbedded_system%22+title%3D%22Embedded+system%22%3Eembedded+systems%3C%2Fa%3E++markets+had+often+pioneered+other+computer+improvements+by+providing+a++large+market+that+did+not+care+about+compatibility+with+older+software.%0D%0AIn+January+2000%2C+a+company+called+%3Ca+href%3D%22http%3A%2F%2Fen.wikipedia.org%2Fwiki%2FTransmeta%22+title%3D%22Transmeta%22%3ETransmeta%3C%2Fa%3E++took+the+interesting+step+of+placing+a+compiler+in+the+central++processing+unit%2C+and+making+the+compiler+translate+from+a+reference+byte++code+%28in+their+case%2C+%3Ca+href%3D%22http%3A%2F%2Fen.wikipedia.org%2Fwiki%2FX86%22+title%3D%22X86%22%3Ex86%3C%2Fa%3E++instructions%29+to+an+internal+VLIW+instruction+set.+This+approach++combines+the+hardware+simplicity%2C+low+power+and+speed+of+VLIW+RISC+with++the+compact+main+memory+system+and+software+reverse-compatibility++provided+by+popular+CISC.%0D%0A%3Ca+href%3D%22http%3A%2F%2Fen.wikipedia.org%2Fwiki%2FIntel%22+title%3D%22Intel%22%3EIntel%3C%2Fa%3E%27s+%3Ca+href%3D%22http%3A%2F%2Fen.wikipedia.org%2Fwiki%2FItanium%22+title%3D%22Itanium%22%3EItanium%3C%2Fa%3E+chip+is+based+on+what+they+call+an+%3Ca+class%3D%22mw-redirect%22+href%3D%22http%3A%2F%2Fen.wikipedia.org%2Fwiki%2FExplicitly_Parallel_Instruction_Computing%22+title%3D%22Explicitly+Parallel+Instruction+Computing%22%3EExplicitly+Parallel+Instruction+Computing%3C%2Fa%3E++%28EPIC%29+design.+This+design+supposedly+provides+the+VLIW+advantage+of++increased+instruction+throughput.+However%2C+it+avoids+some+of+the+issues++of+scaling+and+complexity%2C+by+explicitly+providing+in+each+%22bundle%22+of++instructions+information+concerning+their+dependencies.+This+in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